In a conventional electronic memory circuit, like the one shown in FIG. 1, an incoming memory address is divided into row and column addresses, each decoded separately. The selected memory location is the intersection of the select lines generated by the row and column decoders. In common bus multiprocessors these decoders have traditionally been a performance limiting bottleneck. Each decoder can process only a single encoded address, thus limiting memory access to a single location. Memory interleaving techniques, which subdivide the memory space into regions, each in a separate memory unit, see Chen, T.C., "Overlap and Pipeline Processing", in Introduction to Computer Architecture, ed. Harold Stone, Science Research Associates, 1975, are commonly applied in an attempt to make parallel some subset of memory accesses. More recently, sophisticated cache memory systems, see Briggs, F. and K. Hwang, Computer Architecture and Parallel Processing, McGraw Hill, 1984, have been developed which physically reproduce portions of shared memories in a local store. Both systems have obvious limitations. Interleaved systems impose an ordering in which parallel accesses to a shared memory may be made, and cache memories rely on the locality of memory references for each processor and require a large overhead to support cache coherence.
The present invention overcomes these limitations by using the high bandwidth of optics to time multiplex fully decoded addresses into an optical "select" puIse train. Using a technique based on the coincidence of optical pulses the optical select pulse train can be directly applied to a memory array to address one or more memory cells. Effective parallelism is possible in this technique because of the differential between optical and electronic bandwidth. Within a single electronic memory access cycle, N parallel memory references are possible where N is limited only by the ratio of optical to electronic bandwidths.
The addressing mechanism, which is called "optical pulse delay modulation", is based on the use of time delays between optical pulses. The optical pulses are propagated through waveguides in several directions through the memory array. By appropriately adjusting the delays, these pulses can be made to coincide at specific memory cells. This coincidence is detected by photodetectors at the addressed locations, thereby selecting those locations for memory access.